面向集成电路电阻电容提取的高级场求解器技术 英文版
出版时间：2014年版
内容简介
　　《面向集成电路电阻电容提取的高级场求解器技术》电阻、电容（RC）提取是设计纳米制造工艺集成电路的重要步骤，通过它对集成电路中的互连线或衬底耦合效应进行电学建模，为进一步的电路性能验证、制造良率分析提供基础。用于RC提取的场求解器方法直接对电场进行求解，因此具有最高的准确度。为了满足集成电路设计中准确建模与仿真的要求，场求解器RC提取方法正变得越来越重要。本书对刻画超大规模集成电路互连线和混合信号集成电路衬底耦合效应的关键场求解器提取方法进行了全面、系统的介绍。通过来自实际电路设计的例子，对各种场求解器算法进行了详细阐述，并说明它们各自的优点和缺点。《面向集成电路电阻电容提取的高级场求解器技术》适合于电子工程和计算机工程相关专业的研究生和学者阅读，也可为工作在集成电路设计、设计自动化领域的技术人员提供参考。
目录
1 Introduction 1.1　The Need for Parasitic Extraction 1.2　The Methods for RC Extraction and Field Solver 1.3　Book Outline 1.4　Summary 2 Basic Field-Solver Techniques for RC Extraction 2.1　Problem Formulation 2.2　Overview of the Numerical Methods 2.3　Indirect Boundary Element Method 2.4　Direct Boundary Element Method 2.5　Floating Random Walk Method 2.6　Summary 3　Fast Boundary Element Methods for Capacitance Extraction (I) 3.1　Basics of Indirect Boundary Element Methods 3.2　Fast Multipole Methods 　　　3.2.1　Introduction 　　　3.2.2　Multipole Expansions 　　　3.2.3　Local Expansions 　　　3.2.4　Fast Multipole Algorithm 3.3　Low-Rank Matrix Compression-Based Fast Iterative Solvers 　　　3.3.1　Why Compression? 　　　3.3.2　Matrix Compression Can Reduce　the Complexity to Linear 　　　3.3.3　Compression Possible? 　　　3.3.4　Basics of Matrix Compression Using SVD and QR 　　　3.3.5　Compression Without Building Entire　Matrix Beforehand 3.4　Matrix Compression by Adaptive Cross Approximation 　　　3.4.1　Adaptive Cross Approximation (ACA) 　　　3.4.2　Recompression of Adaptive Cross Approximation 3.5　Summary 4　Fast Boundary Element Methods for Capacitance Extraction (II) 4.1　Direct Boundary Element Method for Multi-dielectric　Capacitance Extraction 4.2　The Quasi-multiple Medium Approach 　　　4.2.1　Basic Idea 　　　4.2.2　Decomposition of Dielectrics and Boundary Element Partition 　　　4.2.3　Algorithm Description and Analysis 4.3　Equation Organization and Solving Techniques 　　　4.3.1　Organization of the Coefficient Matrix 　　　4.3.2　Extended Jacobi and MN Preconditioners 4.4　Numerical Results 　　　4.4.1　The Comparison with GIMEI 　　　4.4.2　The Comparison with ODDM 　　　4.4.3　The Results for Structures from Real Design 　　　4.4.4　The Comparison with FastCap 4.5　Efficient Techniques for Handling Floating Metal Fills 　　　4.5.1　Basic Idea 　　　4.5.2　Equation Formation and Solution 　　　4.5.3　Numerical Results 4.6　Summary 5　Resistance Extraction of Complex 3-D Interconnects 5.1　Analytical Resistance Formulation 5.2　Field Solver for Interconnect Resistance 　　　5.2.1　Resistance Network of Multiterminal Regions 　　　5.2.2　Resistance Calculation Using Direct BEM 5.3　Fast BEM Solver Using Linear Boundary Elements 　　　5.3.1　Physics-Based Nonuniform Virtual Cutting 　　　5.3.2　Discarding Conductors Not in the Path of Direct Current 　　　5.3.3　Dividing Elements Only in One Direction When Possible 　　　5.3.4　Linear Boundary Elements for Straight Conductors 　　　5.3.5　Efficiency Summary 5.4　Analytical QBEM Extraction 　　　5.4. l　General Analytical QBEM Algorithm 　　　5.4.2　Distinguish Between Regular and Irregular Subregions 　　…… 6　Slbstrate Resistance Extraction with Boundary Element Method 7 Extracting Frequency-Dependent Substrate Parasitics 8 Process Variation-Aware Capacitance Extraction 9 Statistical Capacitance Extraction Based on Continuous-Surface Geometric Model 10 Fast Floating Random Walk Method for Capacitance Extraction 11 FRW-Based Solver for Chip-Scale Large Structures References Index